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Macros and Cleaning with MakeFiles


2004-01-15 05:09:31 AM
cppbuilder80
Most noble and most highly honored colleagues:
I have two questions:
First, I notice that the stock MAKEFILE.MAK file in the Bin directory of the
Command-line tools distribution ends with the lines:
clean:
del *.obj *.res *.tds *.map
From the MAKEFILE sample file in the Examples/StdLib, a more sophisticated
version appears:
clean:
-@if exist *.obj del *.obj>nul
-@if exist *.lib del *.lib>nul
-@if exist rwstdmsg.res del rwstdmsg.res>nul
-@if exist *.exe del *.exe>nul
-@if exist *.dll del *.dll>nul
-@if exist *.tds del *.tds>nul
-@if exist $(PCHROOT).* del $(PCHROOT).*>nul
When I attempt to use either of these methods in my own MAKEFILE, however,
none of the "extra" files get deleted. What am I missing?
Second question (with preface): I notice that in the MAKEFILE.MAK and
BUILTINS.MAK files use some macros that appear to be nowhere defined. These
include in the MAKEFILE:
$(OBJFILES)
$(RESFILES)
$(EXEFILE)
$(LIBFILES)
$(DEFFILE)
and in the BUILTINS file:
$(AFLAGS)
$(CPPFLAGS)
Are these macros somehow intrinsic to MAKE.EXE? Or am I simply not looking
in the correct places for their definitions? If they are intrinsic, i.e.
predefined by the MAKE executable or some other source, where is their
documentation?
With gratitude,
Andrew Fenton
 
 

Re:Macros and Cleaning with MakeFiles

Andrew Fenton wrote:
Quote
clean:
del *.obj *.res *.tds *.map

From the MAKEFILE sample file in the Examples/StdLib, a more sophisticated
version appears:

clean:
-@if exist *.obj del *.obj>nul
-@if exist *.lib del *.lib>nul
-@if exist rwstdmsg.res del rwstdmsg.res>nul
-@if exist *.exe del *.exe>nul
-@if exist *.dll del *.dll>nul
-@if exist *.tds del *.tds>nul
-@if exist $(PCHROOT).* del $(PCHROOT).*>nul

When I attempt to use either of these methods in my own MAKEFILE, however,
none of the "extra" files get deleted. What am I missing?
You have to invoke clean like this:
make -f makefile.mak clean
Quote

Second question (with preface): I notice that in the MAKEFILE.MAK and
BUILTINS.MAK files use some macros that appear to be nowhere defined. These
include in the MAKEFILE:
Hmm, I don't have a file called makefile.mak in my bin directory.
Quote
$(AFLAGS)
$(CPPFLAGS)

Are these macros somehow intrinsic to MAKE.EXE?
I don't think so. If they are not defined, they just expand to nothing.
Add !message $(AFLAGS) at the beginning of your makefile and you'll see
that nothing is printed out.
builtins.mak is just the default settings for make. It's automatically
invoked when you call make unless you specify to not use it with the -r
switch IIRC.
Michel
--
----------------------------------------
Michel Leunen
mailto: XXXX@XXXXX.COM
C++Builder, C++BuilderX, BCC5.5.1 Web site:
www.leunen.com/
----------------------------------------
 

Re:Macros and Cleaning with MakeFiles

Michel,
Thanks for your response. It helped me to come up with another solution.
"Michel Leunen" < XXXX@XXXXX.COM >wrote in message
Quote
You have to invoke clean like this:

make -f makefile.mak clean
Apparently, the above statement indicates that there must be an explicit
call to the Clean rule in order to make it function.
I tested this by placing a reference to the Clean rule in my Symbolic Target
line. The following MAKEFILE snippet shows this:
AllFiles: trial.exe clean
trialrun.obj: trialrun.c
bcc32 $(CFLAGS) trialrun.c
trial.exe: trialrun.obj
ilink32 $(LFLAGS) $(CONSTARTUP) trialrun.obj, trial.exe,, $(SQLIBS)
$(STDLIBS)
clean:
-@if exist *.obj del *.obj>nul
-@if exist *.tds del *.tds>nul
-@if exist .... etc.
This addition had the desired effect of automating my Clean rule.
Previously, I had only trial.exe in the AllFiles line. The trialrun.obj
rule functioned either because of linked dependency or because it was the
first rule. Clean, however is not part of the linked dependency and so,
apparently, would never run.
If the details of this explanation should be corrected or ammended, I
welcome anyone's additional comments.
Thanks,
Andrew Fenton
 

{smallsort}

Re:Macros and Cleaning with MakeFiles

Andrew Fenton wrote:
Quote
This addition had the desired effect of automating my Clean rule.
Note that it's not recommended to automatically delete obj files.
When you build a project containing multiple files, make only recompile
the files that have been changed. If you delete all obj files between
each make, it has to recompile all the files not only the ones which
have changed. That's why clean is usually called from the command line.
Michel
--
----------------------------------------
Michel Leunen
mailto: XXXX@XXXXX.COM
C++Builder, C++BuilderX, BCC5.5.1 Web site:
www.leunen.com/
----------------------------------------
 

Re:Macros and Cleaning with MakeFiles

"Michel Leunen" < XXXX@XXXXX.COM >wrote in message
Quote
Note that it's not recommended to automatically delete obj files.
When you build a project containing multiple files, make only recompile
the files that have been changed. If you delete all obj files between
each make, it has to recompile all the files not only the ones which
have changed. That's why clean is usually called from the command line.
Good point! Rather foolish to cause my MAKEFILE to defeat one of its own
purposes.
Thanks,
Andrew Fenton